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Energy Efficient STT-MRAM Reading and Writing Circuits​

The Problem

STT-MRAM is a leading candidate to replace SRAM and DRAM in traditional computing architectures due to its non-volatility, high scalability, and long retention time. In addition to these benefits, MRAM cells may also withstand high radiation and high temperatures, making them attractive for many industrial applications. However, a lingering impediment to wide-spread adoption of MRAM is the excessive energy it takes to write data to Magnetic Tunnel Junctions (MTJs) though the pinned ferromagnetic layer. Furthermore, several desired MRAM applications incur significant energy consumption during memory access, making efficient read operations of utmost importance.​

The Solution

Researchers at the University of Tennessee have developed novel, CMOS-compatible method of writing to MTJs which reduces write power by up to 75%, without additional area penalty. The designs use alternatives to CMOS logic for certain tasks and are thus able to relocate the DC power supplies and minimize quiescent current. Researchers have also proposed a novel sense amplifier based on adiabatic logic, which allows for recovering the normally dissipated charge carried in load capacitors. The energy-efficient sense amplifier results in energy-efficiency improvement across a broad frequency range (1 MHz to 50 MHz) and performs 70% better than standard Pre-charge sense amplifiers typically used in MRAM designs. ​

Benefits

Benefit
Write energy savings up to 75% better than conventional approaches.​
Novel sense amplifier has ≈ 70% efficiency improvement over pre-charge sense amplifiers.​
CMOS compatible, no additional transistor count over state of the art, and ideal for low power, high efficiency applications like IoT and embedded systems.​

More Information

  • Gregory Sechrist, JD
  • Technology Manager, Multi Campus Office
  • 865-974-1882 | gsechris@tennessee.edu
  • UTRF Reference ID: 23156
  • Patent Status: Patent Pending
Close-up of electronic circuit board with various components and equations written in the background

Innovators

Wu Yang

Graduate Research Assistant​, Electrical Engineering and Computer Science​, Tickle College of Engineering, University of Tennessee Knoxville

Mr. Yang received his M.S. from the University of Kentucky in 2021. His research is focused on spintronics circuits.​

Read more about Wu Yang

Amit Degada

Post-Doctoral Research Assistant​, Electrical Engineering and Computer Science, Tickle College of Engineering, University of Tennessee Knoxville​

Dr. Degada received his PhD from the University of Kentucky in 2021. He is a recipient of the Best Paper Award at the International Conference on Consumer Electronics.​

Read more about Amit Degada

Dr. Himanshu Thapliyal​

Professor, Electrical Engineering & Computer Science​, Tickle College of Engineering, University of Tennessee Knoxville

Dr. Thapliyal received his PhD in 2011 from the University of South Florida, Tampa, where he received the "Distinguished Graduate Achievement Award." From 2012-2014, he worked as a designer of processor test solutions at Qualcomm. He joined as an Assistant Professor at the University of Kentucky, Lexington in 2014 and served as an Associate Professor until he joined the University of Tennessee in 2022. He has been ranked in the top 50 scientists throughout the world in computer hardware and architecture, and is the recipient of both the 2019 NSF CAREER award and the 2020 IEE-CS TCVLSI Mid-Career Research Achievement Award. He has authored over 150 journal/conference articles with over 4,800 citations, and holds 3 U.S. Patents for his inventions. ​

Read more about Dr. Himanshu Thapliyal​

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